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Category: Main/Reference/Books
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Writing Testbenches: Functional Verification of HDL Models
Description: How to write testbenches using VHDL, Verilog, e or OpenVera.
Added on: 30-Nov-2003 Hits: 2550
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The Art of Verification
Description: How to write testbenches using Vera
Added on: 14-Dec-2003 Hits: 1639
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Digital Systems Testing & Testable Design
Description: Considered a definitive text in this area, the book includes in-depth discussions of the following topics:
Test generation,
Fault modeling for classic and new technologies,
Simulation,
Fault simulation,
Design for testability,
Built-in self-test Diagnosis
Added on: 14-Dec-2003 Hits: 1885
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Principles of Verifiable RTL Design
Description: Explains how you can write Verilog to describe chip designs at the RT-level in a manner that cooperates with verification processes. Reduces the labor costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer.
Added on: 14-Dec-2003 Hits: 2168
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Systems and Software Verification: Model-Checking Techniques and Tools
Description: Describes in simple terms the theoretical basis of model checking: transition systems as a formal model of systems, temporal logic as formal language for behavioral properties, and model-checking algorithms
Added on: 14-Dec-2003 Hits: 1307
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Model Checking
Description: Provides a comprehensive presentation of the theory and practice of model checking. Includes basic as well as state-of-the-art techniques, algorithms, and tools
Added on: 14-Dec-2003 Hits: 1793
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Introduction to Formal Hardware Verification
Description: Presents an almost complete overview of techniques for hardware verification. Covers all approaches used in existing tools; binary and word-level decision diagrams, symbolic methods for equivalence checking, and temporal logic model checking, and introduces the use of higher-order logic theorem proving for verifying circuit correctness.
Added on: 20-Dec-2003 Hits: 1917
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The Verilog Hardware Description Language
Description: Presents the language through examples illustrating the important styles of representation including: structural models, behavioral models of combinational and sequential circuits for logic synthesis, FSM-datapath models, and cycle-accurate descriptions.
Added on: 20-Dec-2003 Hits: 1442
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Software Inspection: An Industry Best Practice
Description: This is a handy book with a summary and compendium of papers on inspections. The books traces the industry experience with inspections as mirrored in the technical papers published on the subject.
Added on: 20-Dec-2003 Hits: 1382
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Real World FPGA Design with Verilog
Description: Real-life FPGA design, from specification to finished product.
Added on: 20-Dec-2003 Hits: 1181
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