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emailamit
Newbie
Joined: Jul 15, 2004
Posts: 1
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 Posted: Sat Aug 07, 2004 8:18 pm Post subject: feedback loops or latches? |
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Hi,
For the following rtl-construct (and other similar complex forms)
out = (sel)? out : in;
the rtl-synthesis can either create a feedback combinational loop or it can infer a level-senstitive latch.
What is the preferred way to synthesize logic for such a circuit considering that the synthesis tool is used in some functional -verification flow.
--Thanks |
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pearlsuresh
Newbie
Joined: Oct 02, 2004
Posts: 1
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| Posted: Sat Oct 02, 2004 5:58 am Post subject: re: |
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| Quote: |
hi,
synthesis tool will infer a combinational(with warning msg) feedback loop and it is not a desired coding style..
the same functionality will be implemented by specifically telling the tool to infer a latch,
| Code: |
always @ clk or din
begin
if (clk==1)
q<=din;
end
cheers,
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