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vhdlcohen
Industry Expert
Joined: Jan 05, 2004
Posts: 1237
Location: Los Angeles, CA
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 Posted: Wed Jul 28, 2004 12:03 am Post subject: Relative Debugging // ABV in software world |
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Take a look at the link below about verification in the software world using Assertion-Based Verification techniques. Below is a quote from that article.
| Quote: | | The user first formulates a set of assertions about key data structures in the reference and the development versions. These assertions specify locations at which data structures should be identical: violations of the assertions indicate errors. |
Link to "About Relative Debugging"
http://guardsoft.com/about.html
Interesting comparisons to our hardware verification world!
Ben
_________________
Ben Cohen http://www.systemverilog.us/
* SystemVerilog Assertions Handbook, 3rd Edition, 2013
* A Pragmatic Approach to VMM Adoption
* Using PSL/SUGAR ... 2nd Edition
* Real Chip Design and Verification
* Cmpt Design by Example
* VHDL books |
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vhdlcohen
Industry Expert
Joined: Jan 05, 2004
Posts: 1237
Location: Los Angeles, CA
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| Posted: Wed Jul 28, 2004 9:15 pm Post subject: |
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In the software world, this Assertion-Based Verification techniques is considered "revolutionary" !
from [url]
http://developers.slashdot.org/developers/04/05/02/1346209.shtml?tid=156[/url]
"It seems that people are still using print statements to debug programs (Brian Kernighan does!). Besides the ol' traditional debugger, do you know any new debugger that has a REVOLUTIONARY way to help us inspect the data? (don't answer it with ddd, or any other debugger that got fancy data display), what I mean is a new revolutionary way. I have only found one answer. It seems that Relative Debugging is quite neat and cool."
_________________
Ben Cohen http://www.systemverilog.us/
* SystemVerilog Assertions Handbook, 3rd Edition, 2013
* A Pragmatic Approach to VMM Adoption
* Using PSL/SUGAR ... 2nd Edition
* Real Chip Design and Verification
* Cmpt Design by Example
* VHDL books |
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