Want to know more about Verilog race conditions

Newsletter · Original Contribution Joined: Dec 08, 2003 Posts: 1107

Originally from Issue 4.19, Item 6.0)

From: Venkat V

I would like to know more aboutt race conditions in verilog. What ever you explained in your book with the example of incrementing a counter in one loop and displaying in other loop is not clear to me.

Can you please expand in more details?

RobertClark · Posted: Sun Jan 11, 2004 4:26 pm **Post subject:**

Here is a link to Verilog Race condition descriptions:

http://www.parmita.com/verilogcenter/titbits.html

The text bellow is from Cliiff Cummings of Sunburst Design "refrigerator magnet".

http://www.sunburst-design.com/

Rules to avoid Verilog race conditions:

Guideline #1: Sequential logic - use nonblocking assignments

Guideline #2: Latches - use nonblocking assignments

Guideline #3: Combinational logic in an always block - use blocking assignments

Guideline #4: Mixed sequential and combinational logic in the same always block - use nonblocking assignments

Guideline #5: Do not mix blocking and nonblocking assignments in the same always block

Guideline #6: Do not make assignments to the same variable from more than one always block

Guideline #7: Use $strobe to display values that have been assigned using nonblocking assignments

Guideline #8: Do not make #0 procedural assignments

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