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dave_59
Senior
Joined: Jun 22, 2004
Posts: 974
Location: Fremont, CA
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 Posted: Wed Oct 08, 2008 6:05 pm Post subject: |
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| DavidCastle wrote: | Greetings Dave,
I saw that statement, but it sounds so nebulous that I didn't think it was really saying what it sounded like. And, it leaves a lot unsaid like, "Which version is an extension of which version?"
Regards,
David |
| introduction wrote: | SystemVerilog is a unified hardware design, specification, and verification language that is based on the
Accellera SystemVerilog 3.1a extensions to the Verilog HDL [B1]a, published in 2004. |
| 1.1 Scope wrote: | This standard specifies extensions for a higher level of abstraction for modeling and verification with the
Verilog® hardware description language (HDL). |
| 1.2 Purpose wrote: | | SystemVerilog is built on top of IEEE Std 1364. |
| 2 Normative references wrote: | The following referenced documents are indispensable for the application of this standard. For dated references,
only the edition cited applies. For undated references, the latest edition of the referenced document
(including any amendments or corrigenda) applies.
IEEE Std 1364™, IEEE Standard for Verilog Hardware Description Language.3, 4, 5
IEEE Std 754™, IEEE Standard for Binary Floating-Point Arithmetic. |
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tessitd
Senior
Joined: Sep 05, 2006
Posts: 286
Location: Colorado
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| Posted: Thu Oct 09, 2008 3:34 pm Post subject: |
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| DavidCastle wrote: | | 4 years |
Man -- I must be working to hard, it took me 2 days to see the humor. Thanks David!!!
No really how do I make VCS compile code with this simple line:
x = $sin(.5);
I only saw a +v2k switch but not a +v2005 switch. Is 2005 supported by VCS and more importantly is the $(your favorite math function) supported?
TomT... |
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shalom
Senior
Joined: Jan 06, 2004
Posts: 110
Location: Jerusalem, Israel
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| Posted: Sun Oct 12, 2008 7:38 am Post subject: |
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That is what I wrote:
"So in principle, SV includes Verilog-2005. In practice, actual implementations do not yet do this."
Shalom |
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chrisspear
Senior
Joined: Jun 15, 2004
Posts: 202
Location: Marlboro, MA
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| Posted: Mon Oct 13, 2008 9:55 am Post subject: |
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The following works in VCS 2006.06-SP2:
| Code: | program automatic test;
import "DPI-C" function real sin (input real a);
initial
$display(s);
endprogram : test |
Support for $sin is not in this release, but the DPI version is just fine.
Oh, don't forget to put the 0 at the front of 0.5
_________________
Chris Spear
Co-Author: SystemVerilog for Verification - 3rd edition!
http://chris.spear.net/systemverilog |
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