Communication protocol Design!

EEEngineer · Junior Joined: Jul 26, 2004 Posts: 8

Hello ,

Thanx for the replies earlier.. They were all very useful in solving my problems.

I have few more questions:

(1) I need to send a 30-bit data on Data-line from module 'A' to module 'B' serially on every clock edge. And the module 'B' should respond back on the same Data-line with a known response. How do I do this? According to me, I need to have a Serial Tx in module 'A' and a Serial Rx in module 'B' to do it. I feel the block diagram will be something like this:

A ----------- > Bus lines(Control logic) ------------- > B

The above diagram means that: Module 'A' will send few clock pulses to the bus-logic for bus communication first. Then a Command will be sent on Data-line to 'B'. After receiving the Command it will respond on the same Data-line again via the Bus-logic to 'A'.

(2) Say I have a module 'A' and some bus-logic. In order to start communication with the bus-logic below are the rules:
- 50 clock pulses need to be sent to start bus communication.
- Then bus needs to send 10 clock pulses of delay to assert
communication.

How do I achieve the above?

Thanx,
waiting...

Larry · Senior Joined: May 24, 2004 Posts: 10

Hello EEengineer,

This sounds a lot like a homework problem. If it is a homework problem and you're really "EEstudent" instead of "EEengineer", you would do better to do some research in digital design and communications first, and then try to invent various solutions by yourself. Sure, some of them won't work, but you will gain tremendous practical knowledge by debugging and investigating those trial solutions. Having the solution simply handed to you by more experienced practicing engineers might get you through your current project, but you won't learn much. Many recent digital design textbooks have exampes of FSM design, and there are useful "cookbooks" for HDLs too. Check your school library for any book with "Verilog" in the title, or go shopping at your favorite online bookstore (my favorite metastore is http://www.addall.com).

If it isn't a homework problem, then I have three comments:

(1) Your design problem is incompletely specified; you need to get more definition from your project leader, and if you can't, then make sure your resume is up to date....

(2) Rather than inventing your own communications protocol, consider researching and reusing any of the existing ones; look, for example, at One-Wire, I2C, TWI, SPI, CAN, 10BT, and other minimal-wire interfaces used in industry. Perhaps other folks can suggest more.

(3) When you have specific questions about how to verify your design, or a question about the finer points of a hardware language, or why one approach is better than another, then come back to this forum to ask those questions; you'll find a large and willing community that is ready to help, but most of us draw the line at doing your job for you unless we also get paid to do it.

Just my opinions, not necessarily those of this forum, its moderator, or my employer.

EEEngineer · Junior Joined: Jul 26, 2004 Posts: 8

Hey Larry,

I just graduated with MS and now working full time as Systems Engineer.
I am actually working on the Host architecture development for SD protocol. I have made the Command and response detection successfully... But having problems regargint he host architecture.. bcos I need to make a very generic module...

And yes, I do not have any written specification. I made a very quick one myself bcos I know without specification its goingno where...
Since this is a startup and so I am the only Systems Engineer here.. Doing it all myself... I know my questions might sound very basic (much like HW problems) but I feel that describing my problems in simple words would make others to provide me useful tips..

And yes u said rightly I am just getting used to the industry standard bus architectures and their implementations....

Thanx for u r suggestions.. Infact i have the "Communication protocol design" working now..

Anyways thanx and next time I will make sure that I dont bother you guys much...

Larry · Senior Joined: May 24, 2004 Posts: 10

Congrats on your recent MS degree, and your position at your startup.

My best advice is to reuse an industry standard for communications unless you can prove that none of them will meet your requirements. If you use a standard, your schedule will thank you, your boss will thank you, and your customers will {eventually} thank you.

The other recommendation I have is to start with a requirements document, before you write any HDL code. Take the time to spell out exactly what the goals of the design module are in the system context. Then, put together a testbench that will exercise each of the items in your requirements document. (It looks like you're writing your testbench in Verilog, and since testbench code does not generally need to be synthesizable, it is generally easier and faster to write.) Make the testbench self-checking so that you don't need to spend time looking at waveform dumps or lengthy log files. Only after you have the requirements document and a corresponding testbench should you start your implementation.

vhdlcohen · Posted: Fri Aug 20, 2004 10:33 am **Post subject:**